The proposal outlines key contributions and innovations, specifically the implementation of a single-level carry save adder (CSA) to eliminate carry propagation in expansion operations, along with operand precomputation and configuration transformation. This method yields a reduced hardware expense and a minimized critical path delay; however, it necessitates an increased number of clock cycles to achieve a single duplication. To mitigate the problem of increased clock cycles, a configurable carry-select adder (CCSA) is proposed, which has the potential to substantially decrease the additional clock cycles required for operand precomputation and configuration transformation. A mechanism is introduced to identify and bypass unnecessary carry save expansion operations in the one-level CCSA design. This approach ensures a short critical path delay while concealing the additional clock cycles required for operand precomputation and configuration transformation. This optimization results in increased throughput and enhanced performance. The experimental results indicate that the proposed Montgomery modular multiplier exhibits enhanced performance and a notable improvement in area-time product relative to earlier designs. The proposed approach provides an efficient solution for Montgomery multiplication by balancing hardware cost, critical path delay, and throughput.

Carry select adder, Configurable carry select adder, Montgomery multiplication