Volume 19 No 7 (2021)
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Efficient VLSI Implementation of a Median Filter Using Data Comparator Logic for Real-Time Image Noise Reduction
Parvatham Sathish, Senthil Kumar Murugesan, M Srikanth
Abstract
Filters are essential for removing several kinds of noise from photographs, including Gaussian, random, and salt and pepper noises. As a result, in real-time applications, the hardware implementation of filters designed for Very Large-Scale Integration (VLSI) becomes crucial. However, issues with excessive look-up-table (LUT) usage, route delays, and power consumption plague traditional hardware-based filters. The use of a Median Filter (MF) using Data Comparator (DC) logic is the main focus of this study. The method begins with a data comparator controlled by multiplexer selection logic that determines the high and low values from a pair of numbers. To find the median value, the data comparator is then applied repeatedly over a range of nine-pixel combinations. Both subjective and objective assessments confirm that the suggested MF-DC performs better than current methods, showing superiority in hardware parameters like as power consumption, latency, and LUTs as well as noise reduction.
Keywords
Comparator, Median Filter, Data Comparator, Look-up-Table, Matlab, Route Delays, Noise Reduction, Real-Time Image Processing, VLSI Implementation.
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